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Multilevel Data Reuse Scheme for Off-Chip Memory Accesses Reduction Applied to a Motion Estimation Architecture

Mateus GrellertFelipe SampaioJulio C. B. MattosLuciano Agostini

Motion Estimation (ME) in video coding is a vital component that excels not only in computationalcomplexity, but on-chip memory bandwidth as well. These two issues are considered critical constraints in terms of High Definition (HD) video coding, since a large number of data must be processed. The multilevel data reuse scheme proposed in this paper is able to reduce the off-chip memory bandwidth, with direct impact in throughput and energy consumption. This scheme explores the concept of overlapped Search Windows (SW) in more than one level and poses no harm to video quality. Comparisons with related works show that this solution provides the best tradeoff between the use of on-chip memory and reduction of the off-chip memory bandwidth. The data reuse scheme was applied in a ME architecture and the synthesis results show that this solution presented the lowest use of hardware resources and the highest operation frequency among related works. The proposed architecture is able to process 1080p videos at 25 fps, and the reduction ratio of off-chip memory access achieved by the architecture is greater than 95% when compared to the traditional method.

http://www.lbd.dcc.ufmg.br/colecoes/sim/2011/0010.pdf

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