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Statically Calculating Secondary Thread Performance in ASTI Systems

Siddhartha ShivshankarSunil VangaraAlexander G. Dean

This paper makes two contributions to Asynchronous Software Thread Integration (ASTI). First, it presents methods to calculate worst-case secondary thread performance statically, enabling real-time performance guarantees for the system. Second, it improves the run-time performance of integrated threads by partitioning the register file, allowing faster coroutine calls. We present experimental results showing the secondary thread performance attainable on an 8-bit embedded microcontroller of the AVR architecture. We examine two embedded protocols (CAN and MIL-STD-1553B) and two secondary threads (PID controller and serial host interface).

http://www.lbd.dcc.ufmg.br/colecoes/wtr/2005/013.pdf

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Biblioteca Digital Brasileira de Computação - Contato: bdbcomp@lbd.dcc.ufmg.br
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