Denise Costa AlvesJosé Eduardo BertuzzoEduardo Rodrigues Lima

The implementation of an LDPC Decoder for theDVB-S2 standard is a challenging task, specially because of 1)the large parity-check matrices and 2) the iterative decodingalgorithm, which may represent a bottleneck within the receiverdata flow. This paper presents a pipelined architecture forLDPC decoding based on a semi-parallel implementation ofthe Minimum-Sum algorithm, a simplification of the Belief-Propagation decoding algorithm, and the results of a modelsimulation and an early synthesis for FPGA prototyping.

http://www.lbd.dcc.ufmg.br/colecoes/wcas/2013/0014.pdf

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Denise Costa AlvesJosé Eduardo BertuzzoEduardo Rodrigues Lima

The implementation of an LDPC Decoder for theDVB-S2 standard is a challenging task, specially because of 1)the large parity-check matrices and 2) the iterative decodingalgorithm, which may represent a bottleneck within the receiverdata flow. This paper presents a pipelined architecture forLDPC decoding based on a semi-parallel implementation ofthe Minimum-Sum algorithm, a simplification of the Belief-Propagation decoding algorithm, and the results of a modelsimulation and an early synthesis for FPGA prototyping.

http://www.lbd.dcc.ufmg.br/colecoes/wcas/2013/0014.pdf

Caso o link acima esteja inválido, faça uma busca pelo texto completo na Web: Buscar na Web

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