Improving Fault Tolerance to Radiation Effects in Integrated Systems

Gustavo NeubergerFernanda KastensmidtRicardo Reis

This paper describes the radiation effects in integrated systems and discusses some techniques to mitigate these effects. The main circuits analyzed are SRAM memories and SRAM-based FPGAs. New techniques used to protect these circuits against these effects are also proposed in this work. One of the presented techniques to protect FPGAs is based on a combination of Double Modular Redundancy (DMR) with Concurrent Error Detection (CED) that can reduce overheads comparing to Triple Modular Redundancy (TMR). In the case of SRAM memories, a technique based on the Reed-Solomon Code and Hamming Code was developed, as well as a tool to generate a core for fault-tolerance that minimizes the area cost of the code. Some results are presented.

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