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An FPGA Version of a Non-Linear Adaptive Filter

Denis FrancoLuigi Carro

This paper presents the study of a non-linear adaptive filter implementation using VHDL, targeted to FPGA devices. The paper presents the basic structure of the filter, as well as a discussion on the area and speed results with different multipliers. A full 8-tap filter was synthesized with different architecture choices.

http://csdl.computer.org/dl/proceedings/sbcci/1999/0387/00/03870128.pdf

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