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INCREMENTAL HARDWARE DEVELOPMENT FROM MODULAR MIXED C-VHDL SIMULATION

Márlon Allan LorencettiAltamiro Amadeu SusinWagston Tassoni Staehler

Complex digital systems development needs large amounts of HDL code. Frequent compilations and simulations are time and CPU consuming activities. This paper presents a design flow that starts with a validated modular C-description and allows incremental HDL coding. The C-description is initially structured such that each module will become a hardware module, in a one to one correspondence, and then coded in C and validated using application specification or benchmark. One module at a time is coded in HDL, and validated by means of test vectors that are generated and analyzed by the system functions. These functions use the same variables to interface either the C or VHDL descriptions. The technique has been used to develop a H.264/AVC video decoder that uses thousands of test vectors.

http://www.lbd.dcc.ufmg.br/colecoes/sforum/2008/0031.pdf

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Biblioteca Digital Brasileira de Computação - Contato: bdbcomp@lbd.dcc.ufmg.br
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