A Coalescing Algorithm for Aliased Registers

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Mariza A. S. BigonhaFabrice RastelloFernando Magno Quintão PereiraRoberto S. Bigonha

Register coalescing is a compiler optimization that removes copy instructions such as a = b from a source program by assigning variables a and b to the same register. The vast majority of coalescing algorithms described in the literature assume homogeneous register banks; however, many important computer architectures, such as x86, ARM, SPARC and ST240 contain an irregularity called register aliasing. Two registers alias if assigning a value to one of them changes the contents of the other. Most of the time registers can be divided into subclasses that hierarchically fit into each other. The objective of this research is to design, implement and test new coalescing algorithms that handle hierarchical register aliasing. We expect that an aliasing aware coalescer will be able to remove more copy instructions than an otherwise oblivious algorithm; thus, decreasing the size and increasing the performance of compiled programs.

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