Graphical tool for mapping and positioning of the Pads

João Janduy BrasileiroJosé Antônio G. de LimaYuri Gonzaga G. da Costa

EDA Tools (Electronic Design Automation) are used to facilitate the project and design of integrated circuits (IC). The Floorplanning is an important step in the design phase of the development layout of an IC. In this step the macro-blocks are positioned on the chip, and are determined: the location of input and output pads, the location of the power pads and the strategies of distribution of the power and clock signal by the core. Commonly is done a wrapper in HDL that maps the input and output ports of the project in instances of pads, with the different types, defined by the developer and a file that indicates the position of each pad on the circuit. Thus, both the mapping and positioning are usually manually done through scripts, generating a great difficulty for developers, because an IC with a reasonable amount of inputs and outputs becomes extremely susceptible to human failures as great difficulty to locating the errors. These files are generally used in all EDA tools as well asthe Design kits suppliers, moreover, the tools have different syntaxes for the files. This work shows a graphical tool able to provide to the developers an easy and intuitive way to manage both the mapping and positioning of the pads, making the process faster and less susceptive to human error. To validate the work, the tool is tested on a project of an IC.

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