A 12-bit Successive Approximation Analog-to-Digital Converter Modeling

Rodrigo Durães de VasconcellosDiógenes Cecílio da Silva Júnior

In this paper, we present the modeling of a 12-bit successive approximation analog-to-digital converter (SAR ADC). The implementation consists of a mixed-signal circuit design, at a high level of abstraction, using Simulink® tools (Stateflow ® and SimscapeTM) and SystemCTM/SystemC-AMS. The modeling process represents the first stage of a project that will end up with an IC prototype and subsequent integration into a SoC (System on Chip). The model offers a better understanding of theSAR architecture, as well as the definition of the blocks that compose the system. The process starts with a Matlab model then SystemC/SystemC-AMS is explored to corroborate the results and also to produce IP (Intellectual Property) modules.

Caso o link acima esteja inválido, faça uma busca pelo texto completo na Web: Buscar na Web

Biblioteca Digital Brasileira de Computação - Contato:
     Mantida por: