Arquitetura para extração de características invariantes em imagens binárias utilizando dispositivos de lógica programável de alta densidade

Guilherme Henrique Renó JorgeValentin Obac Roda

A challenge for digital systems designers is to meet the balance between speed and flexibility.FPGAs and CPLDs where used as "glue logic", reducing the number of components in a system. Theuse of programmable logic (CPLDs and FPGAs) as an alternative to microcontrollers and microprocessors is a real issue. Moments of the intensity function of a group of pixels have been used for the representation and recognition of objects in two dimensional images. Due to the high cost of computing the moments, the search for faster computing architectures is very important. A problem faced by nowadays developed architectures is the speed of computer communication buses. Simpler interfaces, as USB (Universal Serial Bus) and Ethernet, have their transfer rate in Megabytes per second. A solution for this problem is the use the PCI bus, where the transfer rate can achieve Gigabytes per second. This work proposes a soft core architecture, fully compatible with the Wishbone [1] standard, for the extraction of invariant characteristics from binary images using logic programmable devices.

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